Polysilicon Gate Etch

Category: Etch

Process Overview

Polysilicon gate etch is a critical dry etch process used to define the gate electrode in CMOS and advanced node transistors (e.g., FinFET, GAAFET). It removes excess polysilicon from the wafer, leaving a precisely patterned gate structure that controls charge flow in the device. This step follows lithography and oxide hardmask etch, and it directly impacts transistor performance metrics like threshold voltage, leakage, and drive current.

The process uses a reactive ion etch (RIE) or inductively coupled plasma (ICP) system with a chlorine-based chemistry (e.g., HBr/Cl₂/O₂) to achieve high selectivity over silicon dioxide and silicon nitride layers. Uniformity and endpoint detection are critical to avoid over-etching, which can damage underlying layers or create short-channel effects.

In data center and high-performance computing (HPC) chip manufacturing, this process is scaled for high-volume production, requiring tight control of parameters like plasma density, gas flow ratios, and chamber pressure to meet industry standards (e.g., SEMI E142 for etch uniformity).

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Key Process Parameters

| Parameter | Typical Value |
|-------------------------|-----------------------------------|
| Chamber Pressure | 20–40 mTorr |
| Chamber Temperature | 25–40°C |
| HBr Flow Rate | 80–120 sccm |
| Cl₂ Flow Rate | 10–20 sccm |
| O₂ Flow Rate | 2–5 sccm |
| RF Power (13.56 MHz) | 800–1,200 W |
| Etch Rate | 150–250 nm/min (±5% uniformity) |

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Equipment & Parts Required

1. ESCs (Etch Supply Chambers): Maintain stable plasma and gas distribution. Caladan’s ESCs use asymmetrical baffle designs to reduce edge effects and improve uniformity (aligns with SEMI E46 for gas delivery systems).
2. RF Generators: Provide 13.56 MHz power for plasma ignition. Caladan’s generators include phase-locked loops to minimize power fluctuations (>99.9% uptime per ISO 17025).
3. MFCs (HBr, Cl₂, O₂): Precision mass flow controllers ensure accurate gas mixing ratios. Caladan’s MFCs meet ASHRAE Standard 12-2022 for hazardous gas safety and ±1% flow accuracy.
4. Endpoint Detection (OES): Optical emission spectroscopy monitors Si I 390.5 nm and Cl I 391.7 nm wavelengths to detect etch completion. Caladan’s OES systems integrate machine learning models for 95%+ endpoint accuracy (per SEMI E20-1206).

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Common Issues & Troubleshooting

1. Non-Uniform Etch Profile: Check ESC baffle wear or RF generator output drift. Replace ESC components or recalibrate RF power sensors.
2. Poor Endpoint Detection: Likely due to OES lens contamination or outdated spectral libraries. Clean OES optics and update calibration databases.
3. Excessive Polymer Deposition: Adjust Cl₂/O₂ ratio (increase Cl₂ by 5–10%) to balance passivation. Verify MFC accuracy for O₂.
4. Chamber Loading Effects: Precondition the ESC with a dummy wafer or increase RF bias power by 5%.

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Frequently Asked Questions

Q: What is the typical etch rate for polysilicon in a Cl₂/HBr/O₂ plasma?
A: The etch rate ranges from 150–250 nm/min, depending on power and gas ratios (industry standard: ±5% uniformity per SEMI E142).

Q: Why is O₂ added to the etch chemistry?
A: O₂ enhances passivation by forming SiOClx polymers, which protect sidewalls and improve profile control.

Q: How does RF generator stability impact gate etch?
A: Power fluctuations >±2% can cause etch rate variability. Caladan’s RF generators maintain <±0.5% stability (per IEEE Std 1844-2017).

Q: What industry standards govern gas delivery safety for HBr/Cl₂?
A: SEMI S23 and OSHA 29 CFR 1910.1200 require leak rates <1 ppm and redundant MFC shutoffs.

Q: Can endpoint detection be used for thin gate oxides (<2 nm)?
A: Yes, but OES must be paired with in-situ ellipsometry for sub-2 nm thickness monitoring (per ISO 22483).

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Parts for This Process

Looking for parts to support this process? Caladan Semi stocks used and refurbished components including: ESCs, RF generators, MFCs (HBr, Cl2, O2), endpoint detection (OES).

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